|
Shiv Sikand Vice President of Engineering
Shiv first started tackling the problems related to design data management at HAL Computer Systems during the SPARC v9 development program. It was while working on the MIPS processor families at SGI that he designed, implemented and deployed cdsp4, the Cadence-Perforce integration after extensive research. It was used extensively within MIPS and in the Advanced Graphics Division. After cdsp4 was Open Sourced, he worked closely with a large group of design professionals in Silicon Valley to enhance his original work. Prior to founding IC Manage, Shiv was at Matrix Semiconductor working on the world's first three-dimensional memory chips. He did his post-graduate research on the design of asynchronous controllers at the University of Manchester, UK in collaboration with ARM Ltd, Philips Research Labs in Holland and IMEC in Belgium. Shiv received his BSc and MSc degrees in Physics and Electrical Engineering from the University of Manchester Institute of Science and Technology. | 