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Michael Cizl joined IPextreme from Synopsys, where he was most recently R&D manager, heading the development of a Bluetooth baseband controller IP core. Mr. Cizl held many positions at Synopsys, in Applications Engineering and in the Consulting group, where he became familiar with RTL-based design flows including design, verification, synthesis, static timing analysis, design for test, and design flow automation. One of his major projects was the redesign of the Infineon C166 microcontroller. Mr. Cizl started his career in 1992 as application engineer with Compiled Designs, a small start-up consulting company focused on VHDL modeling and simulation, which was later acquired by Synopsys. Mr. Cizl has a Diplom-Ingenieur in Electrical Engineering, from the Technical University of Munich. | 