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Anmol has extensive experience and expertise in the areas of formal verification, logic synthesis and arithmetic optimization techniques. Prior to Calypto, he was the architect of the datapath synthesis and optimization group at Ambit Design Systems and Cadence, where he led technology development and productization. Prior to Ambit, Anmol was part of an award-winning team at the MIPS division of SGI that developed and successfully deployed an RTL to gate-level equivalence checker and property checker within the MIPS microprocessor division. Anmol holds a Bachelor of Technology in Computer Science and Engineering from the Indian Institute of Technology, India where he was awarded a gold medal for highest academic achievement by the institute. He holds an MS and PhD in Computer Science from the University of Illinois at Urbana-Champaign, where he was a University of Illinois fellow. Anmol holds multiple patents and has published several papers in the areas of formal verification, logic synthesis and arithmetic optimization techniques. | 