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Ajay Bhatt is an Intel Fellow in the Digital Enterprise Group and director of the Platform Ingredients Architecture and Planning Team in DEG Architecture and Planning, a part of Intel’s Digital Enterprise Group. Bhatt leads several teams responsible for the platform Ingredients architecture and planning for clients, servers, storage, manageability and communications for DEG platforms.
At Intel, Bhatt has lead definition and development of broadly adopted technologies such as the Universal Serial Bus (USB), Accelerated Graphics Port (AGP4X), Desktop Power management Architecture, Chipset Enhancements and PCI Express. Bhatt joined Intel in 1990 as a senior staff architect for Chipset Architecture team in Folsom.
Bhatt received his bachelor’s degree in electrical engineering from the M.S. University, Baroda, India, in 1980. He received his master’s degree from The City University of New York in 1984. Bhatt holds nine U.S. patents, with three more patents pending.
In 1998, 2003 and 2004 Bhatt was nominated to take part in a Distinguished Lecture Series at leading universities in the United States and Asia. He received an Achievement in Excellence Award for his contribution to PCI Express Specification Development in 2002. Bhatt is PCI Express Steering Committee chair at the PCI-SIG. | 